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HPCA
2002
IEEE
14 years 8 months ago
Exploiting Choice in Resizable Cache Design to Optimize Deep-Submicron Processor Energy-Delay
Cache memories account for a significant fraction of a chip's overall energy dissipation. Recent research advocates using "resizable" caches to exploit cache requir...
Se-Hyun Yang, Michael D. Powell, Babak Falsafi, T....
MICRO
2008
IEEE
208views Hardware» more  MICRO 2008»
14 years 1 months ago
Microarchitecture soft error vulnerability characterization and mitigation under 3D integration technology
— As semiconductor processing techniques continue to scale down, transient faults, also known as soft errors, are increasingly becoming a reliability threat to high-performance m...
Wangyuan Zhang, Tao Li
ISPASS
2007
IEEE
14 years 1 months ago
PTLsim: A Cycle Accurate Full System x86-64 Microarchitectural Simulator
In this paper, we introduce PTLsim, a cycle accurate full system x86-64 microprocessor simulator and virtual machine. PTLsim models a modern superscalar out of order x86-64 proces...
Matt T. Yourst
NABIC
2010
13 years 2 months ago
Regional ACO-based routing for load-balancing in NoC systems
Abstract--Ant Colony Optimization (ACO) is a problemsolving technique that was inspired by the related research on the behavior of real-world ant colony. In the domain of Network-o...
Hsien-Kai Hsin, En-Jui Chang, Chih-Hao Chao, An-Ye...
ASPDAC
2007
ACM
108views Hardware» more  ASPDAC 2007»
13 years 11 months ago
Software Performance Estimation in MPSoC Design
- Estimation tools are a key component of system-level methodologies, enabling a fast design space exploration. Estimation of software performance is essential in current software-...
Márcio Oyamada, Flávio Rech Wagner, ...