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DATE
2006
IEEE
171views Hardware» more  DATE 2006»
14 years 3 months ago
Dynamic bit-width adaptation in DCT: image quality versus computation energy trade-off
We present a dynamic bit-width adaptation scheme in DCT applications for efficient trade-off between image quality and computation energy. Based on sensitivity differences of 64 ...
Jongsun Park, Jung Hwan Choi, Kaushik Roy
MICRO
2007
IEEE
133views Hardware» more  MICRO 2007»
14 years 3 months ago
Revisiting the Sequential Programming Model for Multi-Core
Single-threaded programming is already considered a complicated task. The move to multi-threaded programming only increases the complexity and cost involved in software developmen...
Matthew J. Bridges, Neil Vachharajani, Yun Zhang, ...
DATE
2003
IEEE
102views Hardware» more  DATE 2003»
14 years 2 months ago
G-MAC: An Application-Specific MAC/Co-Processor Synthesizer
: A modern special-purpose processor (e.g., for image and graphical applications) usually contains a set of instructions supporting complex multiply-operations. These instructions ...
Alex C.-Y. Chang, Wu-An Kuo, Allen C.-H. Wu, TingT...
MICRO
2002
IEEE
173views Hardware» more  MICRO 2002»
14 years 1 months ago
Vector vs. superscalar and VLIW architectures for embedded multimedia benchmarks
Multimedia processing on embedded devices requires an architecture that leads to high performance, low power consumption, reduced design complexity, and small code size. In this p...
Christoforos E. Kozyrakis, David A. Patterson
CGO
2004
IEEE
14 years 23 days ago
FLASH: Foresighted Latency-Aware Scheduling Heuristic for Processors with Customized Datapaths
Application-specific instruction set processors (ASIPs) have the potential to meet the challenging cost, performance, and power goals of future embedded processors by customizing ...
Manjunath Kudlur, Kevin Fan, Michael L. Chu, Rajiv...