1414 search results - page 109 / 283 » Completion Energies and Scale |
GLVLSI
2003
IEEE
14 years 3 months ago
2003
IEEE
With scaling down to deep submicron and nanometer technologies, noise immunity is becoming a metric of the same importance as power, speed, and area. Smaller feature sizes, low vo...
MICRO
2003
IEEE
14 years 3 months ago
2003
IEEE
This paper proposes and evaluates single-ISA heterogeneous multi-core architectures as a mechanism to reduce processor power dissipation. Our design incorporates heterogeneous cor...
MICRO
2002
IEEE
14 years 3 months ago
2002
IEEE
We describe the design, analysis, and performance of an on–line algorithm to dynamically control the frequency/voltage of a Multiple Clock Domain (MCD) microarchitecture. The MC...
CODES
2007
IEEE
13 years 12 months ago
2007
IEEE
In this paper, we propose an efficient technique for run-time application mapping onto Network-on-Chip (NoC) platforms with multiple voltage levels. Our technique consists of a re...
TC
2010
13 years 4 months ago
2010
Dynamic voltage and frequency scaling (DVFS) is a well known and effective technique for reducing power consumption in modern microprocessors. An important concern though is to est...