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» Computational Efficiency Evaluation in Output Analysis
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CODES
2005
IEEE
14 years 3 months ago
High-level synthesis for large bit-width multipliers on FPGAs: a case study
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
Gang Quan, James P. Davis, Siddhaveerasharan Devar...
GECCO
2007
Springer
194views Optimization» more  GECCO 2007»
14 years 3 months ago
Hybrid coevolutionary algorithms vs. SVM algorithms
As a learning method support vector machine is regarded as one of the best classifiers with a strong mathematical foundation. On the other hand, evolutionary computational techniq...
Rui Li, Bir Bhanu, Krzysztof Krawiec
HPCA
2009
IEEE
14 years 10 months ago
Accurate microarchitecture-level fault modeling for studying hardware faults
Decreasing hardware reliability is expected to impede the exploitation of increasing integration projected by Moore's Law. There is much ongoing research on efficient fault t...
Man-Lap Li, Pradeep Ramachandran, Ulya R. Karpuzcu...
DAC
2008
ACM
13 years 11 months ago
Application mapping for chip multiprocessors
The problem attacked in this paper is one of automatically mapping an application onto a Network-on-Chip (NoC) based chip multiprocessor (CMP) architecture in a locality-aware fas...
Guangyu Chen, Feihui Li, Seung Woo Son, Mahmut T. ...
ICDE
2009
IEEE
290views Database» more  ICDE 2009»
14 years 11 months ago
GraphSig: A Scalable Approach to Mining Significant Subgraphs in Large Graph Databases
Graphs are being increasingly used to model a wide range of scientific data. Such widespread usage of graphs has generated considerable interest in mining patterns from graph datab...
Sayan Ranu, Ambuj K. Singh