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124
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DAC
2004
ACM
16 years 3 months ago
Worst-case circuit delay taking into account power supply variations
Current Static Timing Analysis (STA) techniques allow one to verify the timing of a circuit at different process corners which only consider cases where all the supplies are low o...
Dionysios Kouroussis, Rubil Ahmadi, Farid N. Najm
128
Voted
DAC
2006
ACM
16 years 3 months ago
Power-centric design of high-speed I/Os
With increasing aggregate off-chip bandwidths exceeding terabits/second (Tb/s), the power dissipation is a serious design consideration. Additionally, design of I/O links is const...
Hamid Hatamkhani, Frank Lambrecht, Vladimir Stojan...
99
Voted
MICCAI
2005
Springer
16 years 3 months ago
MRA Image Segmentation with Capillary Active Contour
Abstract. Precise segmentation of three-dimensional (3D) magnetic resonance angiography (MRA) image can be a very useful computer aided diagnosis (CAD) tool in clinical routines. O...
Pingkun Yan, Ashraf A. Kassim
111
Voted
ICCAD
2003
IEEE
194views Hardware» more  ICCAD 2003»
15 years 11 months ago
On the Interaction Between Power-Aware FPGA CAD Algorithms
As Field-Programmable Gate Array (FPGA) power consumption continues to increase, lower power FPGA circuitry, architectures, and Computer-Aided Design (CAD) tools need to be develo...
Julien Lamoureux, Steven J. E. Wilton
121
Voted
ISPD
2010
ACM
205views Hardware» more  ISPD 2010»
15 years 9 months ago
Total sensitivity based dfm optimization of standard library cells
Standard cells are fundamental circuit building blocks designed at very early design stages. Nanometer standard cells are prone to lithography proximity and process variations. Ho...
Yongchan Ban, Savithri Sundareswaran, David Z. Pan