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JSA
2006
113views more  JSA 2006»
13 years 9 months ago
A power-efficient TCAM architecture for network forwarding tables
Stringent memory access and search speed requirements are two of the main bottlenecks in wire speed processing. Most viable search engines are implemented in content addressable m...
Taskin Koçak, Faysal Basci
ASPDAC
2010
ACM
152views Hardware» more  ASPDAC 2010»
13 years 7 months ago
Slack redistribution for graceful degradation under voltage overscaling
Modern digital IC designs have a critical operating point, or "wall of slack", that limits voltage scaling. Even with an errortolerance mechanism, scaling voltage below a...
Andrew B. Kahng, Seokhyeong Kang, Rakesh Kumar, Jo...
GLVLSI
2009
IEEE
262views VLSI» more  GLVLSI 2009»
13 years 7 months ago
Power distribution paths in 3-D ICS
Distributing power and ground to a vertically integrated system is a complex and difficult task. Interplane communication and power delivery are achieved by through silicon vias (...
Vasilis F. Pavlidis, Giovanni De Micheli
SLIP
2003
ACM
14 years 2 months ago
Perimeter-degree: a priori metric for directly measuring and homogenizing interconnection complexity in multilevel placement
In this paper, we describe an accurate metric (perimeter-degree) for measuring interconnection complexity and effective use of it for controlling congestion in a multilevel framew...
Navaratnasothie Selvakkumaran, Phiroze N. Parakh, ...
ICCAD
2009
IEEE
87views Hardware» more  ICCAD 2009»
13 years 7 months ago
Mitigation of intra-array SRAM variability using adaptive voltage architecture
SRAM cell design is driven by the need to satisfy static noise margin, write margin and read current margin (RCM) over all cells in the array in an energy-efficient manner. These ...
Ashish Kumar Singh, Ku He, Constantine Caramanis, ...