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116
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DATE
2010
IEEE
118views Hardware» more  DATE 2010»
15 years 5 months ago
Proactive NBTI mitigation for busy functional units in out-of-order microprocessors
Due to fast technology scaling, negative bias temperature instability (NBTI) has become a major reliability concern in designing modern integrated circuits. In this paper, we prese...
Lin Li, Youtao Zhang, Jun Yang 0002, Jianhua Zhao
105
Voted
DATE
2010
IEEE
142views Hardware» more  DATE 2010»
15 years 5 months ago
Automatic microarchitectural pipelining
Abstract--This paper presents a method for automatic microarchitectural pipelining of systems with loops. The original specification is pipelined by performing provably-correct tra...
Marc Galceran Oms, Jordi Cortadella, Dmitry Bufist...
122
Voted
DATE
2009
IEEE
89views Hardware» more  DATE 2009»
15 years 10 months ago
Exploiting clock skew scheduling for FPGA
- Clock skew scheduling (CSS) is an effective technique to optimize clock period of sequential designs. However, these techniques are not effective in the presence of certain desig...
Sungmin Bae, Prasanth Mangalagiri, Narayanan Vijay...
122
Voted
DATE
2008
IEEE
117views Hardware» more  DATE 2008»
15 years 10 months ago
Architecture Exploration of NAND Flash-based Multimedia Card
In this paper, we present an architecture exploration methodology for low-end embedded systems where the reduction of cost is a primary design concern. The architecture exploratio...
Sungchan Kim, Chanik Park, Soonhoi Ha
DATE
2007
IEEE
85views Hardware» more  DATE 2007»
15 years 10 months ago
Low-power warp processor for power efficient high-performance embedded systems
Researchers previously proposed warp processors, a novel architecture capable of transparently optimizing an executing application by dynamically re-implementing critical kernels ...
Roman L. Lysecky