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» Design Methodology and Manufacture of a Microinductor
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VLSID
2004
IEEE
117views VLSI» more  VLSID 2004»
14 years 7 months ago
Evaluating the Reliability of Defect-Tolerant Architectures for Nanotechnology with Probabilistic Model Checking
As we move from deep submicron technology to nanotechnology for device manufacture, the need for defect-tolerant architectures is gaining importance. This is because, at the nanos...
Gethin Norman, David Parker, Marta Z. Kwiatkowska,...
SLIP
2006
ACM
14 years 1 months ago
Generation of design guarantees for interconnect matching
Manufacturable design requires matching of interconnects which have equal nominal dimensions. New design rules are projected to bring guarantee rules for interconnect matching. In...
Andrew B. Kahng, Rasit Onur Topaloglu
DAC
2001
ACM
14 years 8 months ago
Testing for Interconnect Crosstalk Defects Using On-Chip Embedded Processor Cores
Crosstalk effects degrade the integrity of signals traveling on long interconnects and must be addressed during manufacturing testing. External testing for crosstalk is expensive ...
Li Chen, Xiaoliang Bai, Sujit Dey
ICCAD
2003
IEEE
135views Hardware» more  ICCAD 2003»
14 years 21 days ago
ATPG for Noise-Induced Switch Failures in Domino Logic
Domino circuits have been used in most modern high-performance microprocessor designs because of their high speed, low transistor-count and hazard-free operation. However, with te...
Rahul Kundu, R. D. (Shawn) Blanton
ASPDAC
2010
ACM
150views Hardware» more  ASPDAC 2010»
13 years 5 months ago
Post-silicon debugging for multi-core designs
Escaped errors in released silicon are growing in number due to the increasing complexity of modern processor designs and shrinking production schedules. Worsening the problem are ...
Valeria Bertacco