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CODES
1998
IEEE
14 years 1 months ago
The construction of a retargetable simulator for an architecture template
Systems in the domain of high-performance video signal processing are becoming more and more programmable. We suggest an approach to design such systems that involves measuring, v...
Bart Kienhuis, Ed F. Deprettere, Kees A. Vissers, ...
GLVLSI
2010
IEEE
164views VLSI» more  GLVLSI 2010»
14 years 1 months ago
Performance and energy trade-offs analysis of L2 on-chip cache architectures for embedded MPSoCs
On-chip memory organization is one of the most important aspects that can influence the overall system behavior in multiprocessor systems. Following the trend set by high-perform...
Mohamed M. Sabry, Martino Ruggiero, Pablo Garcia D...
CISS
2008
IEEE
14 years 3 months ago
Channel modeling and detector design for dynamic mode high density probe storage
— Probe based data storage is a promising solution for satisfying the demand for ultra-high capacity storage devices. One of the main problems with probe storage devices is the w...
Naveen Kumar, Pranav Agarwal, Aditya Ramamoorthy, ...
FPGA
2005
ACM
215views FPGA» more  FPGA 2005»
14 years 2 months ago
Design, layout and verification of an FPGA using automated tools
Creating a new FPGA is a challenging undertaking because of the significant effort that must be spent on circuit design, layout and verification. It currently takes approximately ...
Ian Kuon, Aaron Egier, Jonathan Rose
ICCAD
1997
IEEE
90views Hardware» more  ICCAD 1997»
14 years 1 months ago
Transformational partitioning for co-design of multiprocessor systems
This paper presents the underlying methodology of Cosmos, an interactive approach for hardware software co-design capable of handling multiprocessor systems and distributed archit...
Gilberto Fernandes Marchioro, Jean-Marc Daveau, Ah...