35 search results - page 1 / 7 » Design automation of self checking circuits |
EURODAC
1994
IEEE
14 years 3 months ago
1994
IEEE
In this paper we explain the steps of the CAD tools developed for self checking circuits. The CAD tools developed are used to design Strongly Fault Secure, Strongly Code Disjoint ...
IOLTS
2006
IEEE
14 years 5 months ago
2006
IEEE
This paper describes a highly reliable digital circuit design method based on totally self checking blocks implemented in FPGAs. The bases of the self checking blocks are parity p...
IOLTS
2008
IEEE
14 years 5 months ago
2008
IEEE
Present and future semiconductor technologies are characterized by increasing parameters variations as well as an increasing susceptibility to external disturbances. Transient err...
IOLTS
2005
IEEE
14 years 4 months ago
2005
IEEE
— In this paper, an innovative self-checking Reed Solomon encoder architecture is described. The presented architecture exploits some properties of the arithmetic operations in G...
DATE
2002
IEEE
14 years 4 months ago
2002
IEEE
In this work, the problem of open faults affecting the interconnections of SC circuits composed by data-path and control is analyzed. In particular, it is shown that, in case open...