195 search results - page 21 / 39 » Design of clocked circuits using UML |
ISLPED
1999
ACM
14 years 5 days ago
1999
ACM
Gating the clock is an important technique used in low power design to disable unused modules of a circuit. Gating can save power by both preventing unnecessary activiiy in the lo...
HOST
2009
IEEE
14 years 2 months ago
2009
IEEE
Abstract—Rapid advances in integrated circuit (IC) development predicted by Moore’s Law lead to increasingly complex, hard to verify IC designs. Design insiders or adversaries ...
DAC
2005
ACM
13 years 9 months ago
2005
ACM
With 90nm CMOS in production and 65nm testing in progress, power has been pushed to the forefront of design metrics. This paper will outline practical techniques that are used to ...
ICCAD
1997
IEEE
13 years 11 months ago
1997
IEEE
The relentless push for high performance in custom digital circuits has led to renewed emphasis on circuit optimization or tuning. The parameters of the optimization are typically...
ISLPED
2003
ACM
14 years 1 months ago
2003
ACM
Ever shrinking device sizes and innovative micro-architectural and circuit design techniques have made it possible to have multi-million transistor systems running at multi-gigahe...