Stencil computations form the performance-critical core of many applications. Tiling and parallelization are two important optimizations to speed up stencil computations. Many til...
In this paper we propose a novel parameterized macromodeling technique for analog circuits. Unlike traditional macromodels that are only extracted for a small variation space, our...
In this paper, we present an architecture exploration methodology for low-end embedded systems where the reduction of cost is a primary design concern. The architecture exploratio...
With the scaling of technology and higher requirements on performance and functionality, power dissipation is becoming one of the major design considerations in the development of...
Jia Yu, Wei Wu, Xi Chen, Harry Hsieh, Jun Yang 000...
The performance advantages in parallel ring-based VCOs are explored. When the number of VCOs is doubled, the parallel VCOs enhance phase noise by 3dB, and the within-chip process-...