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ICCAD
2004
IEEE
114views Hardware» more  ICCAD 2004»
16 years 1 months ago
High-level synthesis using computation-unit integrated memories
Abstract— High-level synthesis (HLS) of memory-intensive applications has featured several innovations in terms of enhancements made to the basic memory organization and data lay...
Chao Huang, Srivaths Ravi, Anand Raghunathan, Nira...
ICCAD
2003
IEEE
148views Hardware» more  ICCAD 2003»
16 years 1 months ago
Multi.Objective Hypergraph Partitioning Algorithms for Cut and Maximum Subdomain Degree Minimization
In this paper we present a family of multi-objective hypergraph partitioning algorithms based on the multilevel paradigm, which are capable of producing solutions in which both th...
Navaratnasothie Selvakkumaran, George Karypis
ICCAD
2002
IEEE
227views Hardware» more  ICCAD 2002»
16 years 1 months ago
Generic ILP versus specialized 0-1 ILP: an update
Optimized solvers for the Boolean Satisfiability (SAT) problem have many applications in areas such as hardware and software verification, FPGA routing, planning, etc. Further use...
Fadi A. Aloul, Arathi Ramani, Igor L. Markov, Kare...
ICCAD
2001
IEEE
201views Hardware» more  ICCAD 2001»
16 years 1 months ago
An Integrated Data Path Optimization for Low Power Based on Network Flow Method
Abstract: We propose an effective algorithm for power optimization in behavioral synthesis. In previous work, it has been shown that several hardware allocation/binding problems fo...
Chun-Gi Lyuh, Taewhan Kim, Chien-Liang Liu
SOSP
2003
ACM
16 years 1 months ago
Performance debugging for distributed systems of black boxes
Many interesting large-scale systems are distributed systems of multiple communicating components. Such systems can be very hard to debug, especially when they exhibit poor perfor...
Marcos Kawazoe Aguilera, Jeffrey C. Mogul, Janet L...
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