173 search results - page 10 / 35 » Domain Reduction for the Circuit Constraint |
ICDM
2009
IEEE
13 years 5 months ago
2009
IEEE
Efficient acquisition of constraint networks is a key factor for the applicability of constraint problem solving methods. Current techniques ease knowledge acquisition by generati...
VTS
2006
IEEE
14 years 1 months ago
2006
IEEE
— In this paper, an algorithm for scan vector ordering, PEAKASO, is proposed to minimize the peak temperature during scan testing. Given a circuit with scan and the scan vectors,...
DAC
2006
ACM
14 years 8 months ago
2006
ACM
Field programmable dual-Vdd interconnects are effective to reduce FPGA power. Assuming uniform length interconnects, existing work has developed time slack budgeting to minimize p...
VLSID
2002
IEEE
14 years 7 months ago
2002
IEEE
Interconnect with an insufficient width may be subject to electromigration and eventually cause the failure of the circuit at any time during its lifetime. This problem has gotten...
DAC
1999
ACM
13 years 11 months ago
1999
ACM
Dual threshold technique has been proposed to reduce leakage power in low voltage and low power circuits by applying a high threshold voltage to some transistors in non-critical p...