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» Domain Reduction for the Circuit Constraint
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CASES
2007
ACM
13 years 11 months ago
Cache leakage control mechanism for hard real-time systems
Leakage energy consumption is an increasingly important issue as the technology continues to shrink. Since on-chip caches constitute a major portion of the processor's transi...
Jaw-Wei Chi, Chia-Lin Yang, Yi-Jung Chen, Jian-Jia...
ICCAD
2001
IEEE
107views Hardware» more  ICCAD 2001»
14 years 4 months ago
A Convex Programming Approach to Positive Real Rational Approximation
As system integration evolves and tighter design constraints must be met, it becomes necessary to account for the non-ideal behavior of all the elements in a system. Certain devic...
Carlos P. Coelho, Joel R. Phillips, Luis Miguel Si...
FPGA
2005
ACM
80views FPGA» more  FPGA 2005»
14 years 27 days ago
Simultaneous timing-driven placement and duplication
Logic duplication is an effective method for improving circuit performance. In this paper we present an algorithm named SPD that performs simultaneous placement and duplication to...
Gang Chen, Jason Cong
PACS
2000
Springer
132views Hardware» more  PACS 2000»
13 years 11 months ago
An Adaptive Issue Queue for Reduced Power at High Performance
Increasing power dissipation has become a major constraint for future performance gains in the design of microprocessors. In this paper, we present the circuit design of an issue ...
Alper Buyuktosunoglu, Stanley Schuster, David Broo...
ISQED
2010
IEEE
177views Hardware» more  ISQED 2010»
14 years 2 months ago
Multi-corner, energy-delay optimized, NBTI-aware flip-flop design
With the CMOS transistors being scaled to sub 45nm and lower, Negative Bias Temperature Instability (NBTI) has become a major concern due to its impact on PMOS transistor aging pr...
Hamed Abrishami, Safar Hatami, Massoud Pedram