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ICCD
2002
IEEE
93views Hardware» more  ICCD 2002»
14 years 4 months ago
Impact of Scaling on the Effectiveness of Dynamic Power Reduction Schemes
Power is considered to be the major limiter to the design of more faster and complex processors in the near future. In order to address this challenge, a combination of process, c...
David Duarte, Narayanan Vijaykrishnan, Mary Jane I...
ASPDAC
2004
ACM
141views Hardware» more  ASPDAC 2004»
14 years 23 days ago
An approach for reducing dynamic power consumption in synchronous sequential digital designs
— The problem of minimizing dynamic power consumption by scaling down the supply voltage of computational elements off critical paths is widely addressed in the literature for th...
Noureddine Chabini, Wayne Wolf
ISCAS
2007
IEEE
136views Hardware» more  ISCAS 2007»
14 years 1 months ago
Feed-Forward Pulse Width Modulation for High Line Regulation Buck or Boost Converters
—A novel feed-forward pulse width modulation (FF-PWM) technique is proposed for improving line regulation of buck or boost (BOB) converters. In order to provide a regulated suppl...
Huan-Jen Yang, Ke-Horng Chen, Yung-Pin Lee
DAC
2004
ACM
14 years 8 months ago
Simultaneous optimization of supply and threshold voltages for low-power and high-performance circuits in the leakage dominant e
Electrothermal couplings between supply voltage, operating frequency, power dissipation and die temperature have been shown to significantly impact the energy-delay-product (EDP) ...
Anirban Basu, Sheng-Chih Lin, Vineet Wason, Amit M...
ICCD
2001
IEEE
121views Hardware» more  ICCD 2001»
14 years 4 months ago
Determining Schedules for Reducing Power Consumption Using Multiple Supply Voltages
Dynamic power is the main source of power consumption in CMOS circuits. It depends on the square of the supply voltage. It may significantly be reduced by scaling down the supply ...
Noureddine Chabini, El Mostapha Aboulhamid, Yvon S...