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ISLPED
2004
ACM
123views Hardware» more  ISLPED 2004»
14 years 1 months ago
An efficient voltage scaling algorithm for complex SoCs with few number of voltage modes
Increasing demand for larger high-performance applications requires developing more complex systems with hundreds of processing cores on a single chip. To allow dynamic voltage sc...
Bita Gorjiara, Nader Bagherzadeh, Pai H. Chou
DATE
2009
IEEE
159views Hardware» more  DATE 2009»
14 years 2 months ago
Design and implementation of a database filter for BLAST acceleration
— BLAST is a very popular Computational Biology algorithm. Since it is computationally expensive it is a natural target for acceleration research, and many reconfigurable archite...
Panagiotis Afratis, Constantinos Galanakis, Euripi...
DATE
2004
IEEE
89views Hardware» more  DATE 2004»
13 years 11 months ago
Improved Symoblic Simulation by Dynamic Funtional Space Partitioning
In this paper, we provide a flexible and automatic method to partition the functional space for efficient symbolic simulation. We utilize a 2-tuple list representation as the basi...
Tao Feng, Li-C. Wang, Kwang-Ting Cheng, Chih-Chan ...
IEEEPACT
2009
IEEE
14 years 2 months ago
Quantifying the Potential of Program Analysis Peripherals
Abstract—As programmers are asked to manage more complicated parallel machines, it is likely that they will become increasingly dependent on tools such as multi-threaded data rac...
Mohit Tiwari, Shashidhar Mysore, Timothy Sherwood
ASPDAC
2007
ACM
89views Hardware» more  ASPDAC 2007»
13 years 11 months ago
Trace Compaction using SAT-based Reachability Analysis
In today's designs, when functional verification fails, engineers perform debugging using the provided error traces. Reducing the length of error traces can help the debugging...
Sean Safarpour, Andreas G. Veneris, Hratch Mangass...