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CASES
2000
ACM
13 years 11 months ago
Flexible instruction processors
This paper introduces the notion of a Flexible Instruction Processor (FIP) for systematic customisation of instruction processor design and implementation. The features of our app...
Shay Ping Seng, Wayne Luk, Peter Y. K. Cheung
DAC
2004
ACM
14 years 1 months ago
Area-efficient instruction set synthesis for reconfigurable system-on-chip designs
Silicon compilers are often used in conjunction with Field Programmable Gate Arrays (FPGAs) to deliver flexibility, fast prototyping, and accelerated time-to-market. Many of these...
Philip Brisk, Adam Kaplan, Majid Sarrafzadeh
DATE
2007
IEEE
100views Hardware» more  DATE 2007»
13 years 7 months ago
A new pipelined implementation for minimum norm sorting used in square root algorithm for MIMO-VBLAST systems
Multiple Input - Multiple Output (MIMO) wireless technology involves highly complex vectors and matrix computations which are directly related to increased power and area consumpt...
Zahid Khan, Tughrul Arslan, John S. Thompson, Ahme...
VLSID
2001
IEEE
164views VLSI» more  VLSID 2001»
14 years 8 months ago
An Efficient Parallel Transparent Bist Method For Multiple Embedded Memory Buffers
In this paper, we propose a new transparent built-in self-test ( TBIST ) method to test multiple embedded memory arrays with various sizes in parallel. First, a new transparent tes...
Der-Cheng Huang, Wen-Ben Jone, Sunil R. Das
ISLPED
2004
ACM
124views Hardware» more  ISLPED 2004»
14 years 1 months ago
Application adaptive energy efficient clustered architectures
As clock frequency and die area increase, achieving energy efficiency, while distributing a low skew, global clock signal becomes increasingly difficult. Challenges imposed by dee...
Diana Marculescu