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121
Voted
CAV
2009
Springer
164views Hardware» more  CAV 2009»
16 years 5 months ago
InvGen: An Efficient Invariant Generator
Abstract. In this paper we present InvGen, an automatic linear arithmetic invariant generator for imperative programs. InvGen's unique feature is in its use of dynamic analysi...
Ashutosh Gupta, Andrey Rybalchenko
ICCAD
2010
IEEE
136views Hardware» more  ICCAD 2010»
15 years 2 months ago
Synthesis of an efficient controlling structure for post-silicon clock skew minimization
Clock skew minimization has been an important design constraint. However, due to the complexity of Process, Voltage, and Temperature (PVT) variations, the minimization of clock sk...
Yu-Chien Kao, Hsuan-Ming Chou, Kun-Ting Tsai, Shih...
150
Voted
DATE
2005
IEEE
150views Hardware» more  DATE 2005»
15 years 10 months ago
Pueblo: A Modern Pseudo-Boolean SAT Solver
This paper introduces a new SAT solver that integrates logicbased reasoning and integer programming methods to systems of CNF and PB constraints. Its novel features include an eff...
Hossein M. Sheini, Karem A. Sakallah
138
Voted
ICCAD
1999
IEEE
84views Hardware» more  ICCAD 1999»
15 years 9 months ago
Timing-driven partitioning for two-phase domino and mixed static/domino implementations
Domino logic is a high-performance circuit configuration that is usually embedded in static logic environment and tightly coupled with the clocking scheme. In this paper, the timi...
Min Zhao, Sachin S. Sapatnekar
ASPDAC
1995
ACM
77views Hardware» more  ASPDAC 1995»
15 years 8 months ago
A scheduling algorithm for synthesis of bus-partitioned architectures
- Due to efficient interconnect structure and internal parallelism bus-partitioned architectures are very beneficial for sub-micron chip design. This paper presents a new approach ...
Vasily G. Moshnyaga, Fumiaki Ohbayashi, Keikichi T...