2620 search results - page 133 / 524 » Efficient Hardware Voxelization |
124
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MICRO
2000
IEEE
15 years 8 months ago
2000
IEEE
While technology is delivering increasingly sophisticated and powerful chip designs, it is also imposing alarmingly high energy requirements on the chips. One way to address this ...
127
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MICRO
1996
IEEE
15 years 8 months ago
1996
IEEE
A machine description facility allows compiler writers to specify machine execution constraints to the optimization and scheduling phases of an instruction-level parallelism (ILP)...
148
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ISLPED
2007
ACM
15 years 6 months ago
2007
ACM
Dynamic voltage scaling (DVS) is known to be one of the most efficient techniques for power reduction of integrated circuits. Efficient low voltage DC-DC conversion is a key enabl...
162
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DAC
2006
ACM
16 years 5 months ago
2006
ACM
Scheduling plays a central role in the behavioral synthesis process, which automatically compiles high-level specifications into optimized hardware implementations. However, most ...
125
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DATE
2006
IEEE
15 years 10 months ago
2006
IEEE
Soft errors have emerged as an important reliability challenge for nanoscale VLSI designs. In this paper, we present a fast and efficient soft error rate (SER) computation algorit...