36 search results - page 1 / 8 » Efficient Seed Utilization for Reseeding based Compression |
VTS
2003
IEEE
14 years 1 months ago
2003
IEEE
ITC
2000
IEEE
14 years 28 days ago
2000
IEEE
In this paper a new scheme for deterministic and mixed mode scan-based BIST is presented. It relies on a new type of test pattern generator which resembles a programmable Johnson ...
ITC
2003
IEEE
14 years 1 months ago
2003
IEEE
We propose a procedure for designing an LFSRbased circuit for masking of unknown output values that appear in the output response of a circuit tested using LBIST. The procedure is...
ET
2002
13 years 8 months ago
2002
In this paper we present a new reseeding technique for test-per-clock test pattern generation suitable for at-speed testing of circuits with random-pattern resistant faults. Our te...
TVLSI
2010
13 years 3 months ago
2010
Hardware debuggers and logic analyzers must be able to record a continuous trace of data. Since the trace data are tremendous, to save space, these traces are often compressed. The...