24 search results - page 5 / 5 » Efficient Testing of Clock Regenerator Circuits in Scan Desi... |
DAC
2003
ACM
14 years 9 months ago
2003
ACM
Reseeding is used to improve fault coverage of pseudorandom testing. The seed corresponds to the initial state of the PRPG before filling the scan chain. In this paper, we present...
VLSID
2006
IEEE
14 years 2 months ago
2006
IEEE
This tutorial present the key aspects of design challenges and its solutions that are being experienced in VLSI design in the era of nano technology. The focus will be on design c...
ITC
2003
IEEE
14 years 1 months ago
2003
IEEE
When developing new designs, debugging the prototype is important to resolve application malfunction. During this board design debug, often a few pins of an IC are measured to che...
DDECS
2007
IEEE
14 years 2 months ago
2007
IEEE
: As scan compression replaces the traditional scan it is important to understand how it works with power. DFT MAX represents one of the two primary scan compression solutions used...