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» Efficient nonlinear distortion analysis of RF circuits
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ICCD
2003
IEEE
134views Hardware» more  ICCD 2003»
14 years 7 months ago
An Efficient Algorithm for Calculating the Worst-case Delay due to Crosstalk
Analyzing the effect of crosstalk on delay is critical for high performance circuits. The major bottleneck in performing crosstalkinduced delay analysis is the high computational ...
Venkatesan Rajappan, Sachin S. Sapatnekar
ENTCS
2006
185views more  ENTCS 2006»
13 years 11 months ago
Time Domain Verification of Oscillator Circuit Properties
The application of formal methods to analog and mixed signal circuits requires efficient methods tructing abstractions of circuit behaviors. This paper concerns the verification o...
Goran Frehse, Bruce H. Krogh, Rob A. Rutenbar, Ode...
DATE
2002
IEEE
111views Hardware» more  DATE 2002»
14 years 3 months ago
A Linear-Centric Modeling Approach to Harmonic Balance Analysis
In this paper we propose a new harmonic balance simulation methodology based on a linear-centric modeling approach. A linear circuit representation of the nonlinear devices and as...
Peng Li, Lawrence T. Pileggi
VLSID
2004
IEEE
147views VLSI» more  VLSID 2004»
14 years 11 months ago
Computing Silent Gate Models for Noise Analysis from Slew and Delay Tables
Abstract--In this paper, we present a new approach to calculate the steady state resistance values for CMOS library gates. These resistances are defined as simple equivalent models...
Shabbir H. Batterywala, Narendra V. Shenoy
ICCAD
1999
IEEE
67views Hardware» more  ICCAD 1999»
14 years 3 months ago
Realizable reduction for RC interconnect circuits
Interconnect reduction is an important step in the design and analysis of complex interconnects found in present-day integrated circuits. This paper presents techniques for obtain...
Anirudh Devgan, Peter R. O'Brien