34 search results - page 3 / 7 » Estimation of state line statistics in sequential circuits |
VLSID
2002
IEEE
14 years 7 months ago
2002
IEEE
Power gating is emerging as a viable solution to reduction of leakage current. However, power gated circuits are different from the conventional designs in the sense that a power-...
ICTAI
1997
IEEE
13 years 11 months ago
1997
IEEE
This paper proposes an optimization algorithm for reducing the power dissipation in a sequential circuit. The encoding of the different states in a Finite State Machine is modifie...
ISCAS
2002
IEEE
14 years 13 days ago
2002
IEEE
A technique for computing the switching activity of synchronous Finite State Machine (FSM) implementations including the influence of temporal correlation among the next state si...
ISQED
2009
IEEE
14 years 2 months ago
2009
IEEE
Estimation of maximal power consumption is an essential task in VLSI circuit realizations since power value significantly affects the reliability of the circuits. The key issue o...
ICCD
1996
IEEE
13 years 11 months ago
1996
IEEE
For circuits where there may be latches with no reset line, we show how to replace some of them with combinational logic. All previous work in sequential optimization by latch rem...