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» Evaluating Hardware Compilation Techniques
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MICRO
2000
IEEE
71views Hardware» more  MICRO 2000»
15 years 8 months ago
Improving BTB performance in the presence of DLLs
Dynamically Linked Libraries (DLLs) promote software modularity, portability, and flexibility and their use has become widespread. In this paper, we characterize the behavior of f...
Stevan A. Vlaovic, Edward S. Davidson, Gary S. Tys...
FPL
1999
Springer
74views Hardware» more  FPL 1999»
15 years 8 months ago
On Tool Integration in High-Performance FPGA Design Flows
Abstract. High-performance design flows for FPGAs often rely on module generators to counter coarse logic-block granularity and limited routing resources, However, the very flexi...
Andreas Koch
ASPLOS
1991
ACM
15 years 8 months ago
Code Generation for Streaming: An Access/Execute Mechanism
Access/execute architectures have several advantages over more traditional architectures. Because address generation and memory access are decoupled from operand use, memory laten...
Manuel E. Benitez, Jack W. Davidson
CASES
2003
ACM
15 years 9 months ago
Extending STI for demanding hard-real-time systems
Software thread integration (STI) is a compilation technique which enables the efficient use of an application’s fine-grain idle time on generic processors without special hardw...
Benjamin J. Welch, Shobhit O. Kanaujia, Adarsh See...
ICCAD
2004
IEEE
121views Hardware» more  ICCAD 2004»
16 years 1 months ago
Factoring and eliminating common subexpressions in polynomial expressions
Polynomial expressions are used to compute a wide variety of mathematical functions commonly found in signal processing and graphics applications, which provide good opportunities...
Anup Hosangadi, Farzan Fallah, Ryan Kastner