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SAMOS
2004
Springer
14 years 27 days ago
Modeling Loop Unrolling: Approaches and Open Issues
Abstract. Loop unrolling plays an important role in compilation for Reconfigurable Processing Units (RPUs) as it exposes operator parallelism and enables other transformations (e.g...
João M. P. Cardoso, Pedro C. Diniz
ICST
2010
IEEE
13 years 6 months ago
Automated and Scalable T-wise Test Case Generation Strategies for Software Product Lines
Abstract—Software Product Lines (SPL) are difficult to validate due to combinatorics induced by variability across their features. This leads to combinatorial explosion of the n...
Gilles Perrouin, Sagar Sen, Jacques Klein, Benoit ...
ICCAD
2002
IEEE
141views Hardware» more  ICCAD 2002»
14 years 4 months ago
A hierarchical modeling framework for on-chip communication architectures
— The communication sub-system of complex IC systems is increasingly critical for achieving system performance. Given this, it is important that the on-chip communication archite...
Xinping Zhu, Sharad Malik
CASES
2004
ACM
14 years 29 days ago
Balancing design options with Sherpa
Application specific processors offer the potential of rapidly designed logic specifically constructed to meet the performance and area demands of the task at hand. Recently, t...
Timothy Sherwood, Mark Oskin, Brad Calder
ICCAD
1998
IEEE
120views Hardware» more  ICCAD 1998»
13 years 11 months ago
Communication synthesis for distributed embedded systems
Designers of distributed embedded systems face many challenges in determining the appropriate tradeoffs to make when defining a system architecture or retargeting an existing desi...
Ross B. Ortega, Gaetano Borriello