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DAC
2008
ACM
14 years 10 months ago
Run-time instruction set selection in a transmutable embedded processor
We are presenting a new concept of an application-specific processor that is capable of transmuting its instruction set according to non-predictive application behavior during run...
Jörg Henkel, Lars Bauer, Muhammad Shafique
ICCAD
2005
IEEE
106views Hardware» more  ICCAD 2005»
14 years 6 months ago
New decompilation techniques for binary-level co-processor generation
—Existing ASIPs (application-specific instruction-set processors) and compiler-based co-processor synthesis approaches meet the increasing performance requirements of embedded ap...
Greg Stiff, Frank Vahid
ICIP
2002
IEEE
14 years 11 months ago
Rule-based semantic summarization of instructional videos
We present a new content-based approach to summarize instructional videos. We first redefine "scene" in instructional videos. Focusing on one dominant scene type, that o...
Tiecheng Liu, John R. Kender
ISLPED
2003
ACM
90views Hardware» more  ISLPED 2003»
14 years 2 months ago
Low cost instruction cache designs for tag comparison elimination
Tag comparison elimination (TCE) is an effective approach to reduce I-cache energy. Current research focuses on finding good tradeoffs between hardware cost and percentage of comp...
Youtao Zhang, Jun Yang 0002
ISCA
2005
IEEE
134views Hardware» more  ISCA 2005»
14 years 3 months ago
An Architecture Framework for Transparent Instruction Set Customization in Embedded Processors
Instruction set customization is an effective way to improve processor performance. Critical portions of application dataflow graphs are collapsed for accelerated execution on s...
Nathan Clark, Jason A. Blome, Michael L. Chu, Scot...