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CODES
2005
IEEE
14 years 1 months ago
High-level synthesis for large bit-width multipliers on FPGAs: a case study
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
Gang Quan, James P. Davis, Siddhaveerasharan Devar...
ISCC
2003
IEEE
14 years 1 months ago
Controlling Bursts in Best-effort Routers for Flow Isolation
In today’s Internet a user can be adversely affected by other users that overload the router. To address this problem, routers need to provide flow isolation. In this paper, we...
Miguel A. Ruiz-Sánchez, Walid Dabbous
DATE
2002
IEEE
100views Hardware» more  DATE 2002»
14 years 28 days ago
AccuPower: An Accurate Power Estimation Tool for Superscalar Microprocessors
This paper describes the AccuPower toolset -- a set of simulation tools accurately estimating the power dissipation within a superscalar microprocessor. AccuPower uses a true hard...
Dmitry Ponomarev, Gurhan Kucuk, Kanad Ghose
JPDC
2000
141views more  JPDC 2000»
13 years 7 months ago
A System for Evaluating Performance and Cost of SIMD Array Designs
: SIMD arrays are likely to become increasingly important as coprocessors in domain specific systems as architects continue to leverage RAM technology in their design. The problem ...
Martin C. Herbordt, Jade Cravy, Renoy Sam, Owais K...
MICRO
2008
IEEE
148views Hardware» more  MICRO 2008»
14 years 2 months ago
Coordinated management of multiple interacting resources in chip multiprocessors: A machine learning approach
—Efficient sharing of system resources is critical to obtaining high utilization and enforcing system-level performance objectives on chip multiprocessors (CMPs). Although sever...
Ramazan Bitirgen, Engin Ipek, José F. Mart&...