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» Exploring the multiple-GPU design space
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VLSID
2002
IEEE
107views VLSI» more  VLSID 2002»
14 years 10 months ago
Automatic Model Refinement for Fast Architecture Exploration
We present a methodology and algorithms for automatic refinement from a given design specification to an architecture model based on decisions in architecture exploration. An arch...
Junyu Peng, Samar Abdi, Daniel Gajski
CODES
2004
IEEE
14 years 1 months ago
Efficient exploration of on-chip bus architectures and memory allocation
Separation between computation and communication in system design allows the system designer to explore the communication architecture independently of component selection and map...
Sungchan Kim, Chaeseok Im, Soonhoi Ha
DAC
2004
ACM
14 years 3 months ago
Extending the transaction level modeling approach for fast communication architecture exploration
System-on-Chip (SoC) designs are increasingly becoming more complex. Efficient on-chip communication architectures are critical for achieving desired performance in these systems....
Sudeep Pasricha, Nikil D. Dutt, Mohamed Ben-Romdha...
CASES
2003
ACM
14 years 1 months ago
A hierarchical approach for energy efficient application design using heterogeneous embedded systems
Several features such as reconfiguration, voltage and frequency scaling, low-power operating states, duty-cycling, etc. are exploited for latency and energy efficient application ...
Sumit Mohanty, Viktor K. Prasanna
PAMI
1998
116views more  PAMI 1998»
13 years 9 months ago
Scale-Space Derived From B-Splines
—It is well-known that the linear scale-space theory in computer vision is mainly based on the Gaussian kernel. The purpose of the paper is to propose a scale-space theory based ...
Yu-Ping Wang, Seng Luan Lee