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    ICCAD
    1997
    IEEE
    97views Hardware» more  ICCAD 1997»
    Low power logic synthesis for XOR based circuits
    13 years 11 months ago
    Low power logic synthesis for XOR based circuits
    Download  www.cs.york.ac.uk
    An abundance of research e orts in low power logic synthesis have so far been focused on and or or nand nor based logic. A typical approach is to rst generate an initial multi-lev...
    Unni Narayanan, C. L. Liu
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    VLSID
    2002
    IEEE
    135views VLSI» more  VLSID 2002»
    An Efficient Algorithm for Low Power Pass Transistor Logic Synthesis
    14 years 8 months ago
    An Efficient Algorithm for Low Power Pass Transistor Logic Synthesis
    Download  www.ece.umn.edu
    In this paper, we address the problem of power dissipation minimization in combinational circuits implemented using pass transistor logic (PTL). We transform the problem of power ...
    Rupesh S. Shelar, Sachin S. Sapatnekar
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    ASPDAC
    2007
    ACM
    88views Hardware» more  ASPDAC 2007»
    Logic and Layout Aware Voltage Island Generation for Low Power Design
    13 years 11 months ago
    Logic and Layout Aware Voltage Island Generation for Low Power Design
    Download  www.cecs.uci.edu
    Multiple supply voltage (MSV) is one of the most effective schemes to achieve low power, but most works are based on logic level. A few recent works are based on physical level but...
    Liangpeng Guo, Yici Cai, Qiang Zhou, Xianlong Hong
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    VLSID
    2005
    IEEE
    139views VLSI» more  VLSID 2005»
    Variable Input Delay CMOS Logic for Low Power Design
    14 years 8 months ago
    Variable Input Delay CMOS Logic for Low Power Design
    Download  www.eng.auburn.edu
    Modern digital circuits consist of logic gates implemented in the complementary metal oxide semiconductor (CMOS) technology. The time taken for a logic gate output to change after...
    Tezaswi Raja, Vishwani D. Agrawal, Michael L. Bush...
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    ISLPED
    1999
    ACM
    160views Hardware» more  ISLPED 1999»
    Mixed-swing quadrail for low power dual-rail domino logic
    13 years 12 months ago
    Mixed-swing quadrail for low power dual-rail domino logic
    Download  www.cecs.uci.edu
    This paper describes a new mixed-swing topology for dual-rail domino logic that results in a simultaneous energy and delay reduction. HSPICE simulation results for a 1-bit full ad...
    Bharath Ramasubramanian, Herman Schmit, L. Richard...
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