276 search results - page 5 / 56 » Extremely Low-Power Logic |
ISLPED
2003
ACM
14 years 24 days ago
2003
ACM
This paper proposes two very fast graph theoretic heuristics for the low power binding problem given fixed number of resources and multiple architectures for the resources. First...
ASPDAC
2006
ACM
14 years 1 months ago
2006
ACM
Abstract— The memory subsystem is known to comprise a significant fraction of the power dissipation in embedded systems. The memory addressing strategy, which determines the seq...
ISLPED
2004
ACM
14 years 29 days ago
2004
ACM
In this paper we investigate the statistics of multiplier operands and identify two characteristics of their distribution that have important consequences for the design of low po...
ISLPED
1999
ACM
13 years 12 months ago
1999
ACM
Gating the clock is an important technique used in low power design to disable unused modules of a circuit. Gating can save power by both preventing unnecessary activiiy in the lo...
ICCD
2004
IEEE
14 years 4 months ago
2004
IEEE
— Reduction in test power is important to improve battery life in portable devices employing periodic self-test, to increase reliability of testing and to reduce test-cost. In sc...