522 search results - page 30 / 105 » Fast Smith-Waterman hardware implementation |
ICCAD
2002
IEEE
14 years 20 days ago
2002
IEEE
The paper describes the folding method of logic functions to reduce the size of memories for keeping the functions. The folding is based on the relation of fractions of logic func...
ICCD
2001
IEEE
14 years 4 months ago
2001
IEEE
In 1987 Sedlak proposed a modulo multiplication algorithm which is suitable for smart card implementation due to it’s low latency time. It is based on ZDN (zwei_drittel_N) arith...
DATE
2007
IEEE
14 years 2 months ago
2007
IEEE
We present a computationally efficient implementation of positive-real balanced truncation (PRBT) for symmetric multiple-input multiple-output (MIMO) systems. The solution of a p...
ISSS
1997
IEEE
13 years 12 months ago
1997
IEEE
In this paper, our memory architecture exploration methodology and CAD techniques for network protocol applications are presented. Prototype tools have been implemented, and appli...
ASAP
2004
IEEE
13 years 11 months ago
2004
IEEE
In this paper, we present the design of a carry skip adder that achieves low power dissipation and high-performance operation. The carry skip adder's delay and power dissipat...