372 search results - page 49 / 75 » Fault simulation on reconfigurable hardware |
FPGA
2007
ACM
14 years 3 months ago
2007
ACM
A reconfigurable logic element (LE) is developed for use in constructing a NULL Convention Logic (NCL) FPGA. It can be configured as any of the 27 fundamental NCL gates, including...
ICCAD
2009
IEEE
13 years 7 months ago
2009
IEEE
In this paper, an adaptive sampling method is proposed for the statistical SRAM cell analysis. The method is composed of two components. One part is the adaptive sampler that manip...
DATE
2000
IEEE
14 years 1 months ago
2000
IEEE
This paper proposes an all digital on-chip bus delay and crosstalk measurement methodology. A diagnosis procedure is derived to distinguish the delay faults in drivers, receivers,...
DAC
2003
ACM
14 years 10 months ago
2003
ACM
Reseeding is used to improve fault coverage of pseudorandom testing. The seed corresponds to the initial state of the PRPG before filling the scan chain. In this paper, we present...
MICRO
2003
IEEE
14 years 2 months ago
2003
IEEE
Single-event upsets from particle strikes have become a key challenge in microprocessor design. Techniques to deal with these transient faults exist, but come at a cost. Designers...