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DATE
2006
IEEE
202views Hardware» more  DATE 2006»
14 years 1 months ago
Automatic systemC design configuration for a faster evaluation of different partitioning alternatives
In this paper we present a methodology that is based on SystemC [1] for rapid prototyping to greatly enhance and accelerate the exploration of complex systems to optimize the syst...
Nico Bannow, Karsten Haug, Wolfgang Rosenstiel
DATE
2003
IEEE
114views Hardware» more  DATE 2003»
14 years 1 months ago
Software Streaming via Block Streaming
Software streaming allows the execution of streamenabled software on a device even while the transmission/streaming may still be in progress. Thus, the software can be executed wh...
Pramote Kuacharoen, Vincent John Mooney, Vijay K. ...
DSD
2010
IEEE
144views Hardware» more  DSD 2010»
13 years 8 months ago
On-chip Scan-Based Test Strategy for a Dependable Many-Core Processor Using a NoC as a Test Access Mechanism
—Periodic on-chip scan-based tests have to be applied to a many-core processor SoC to improve its dependability. An infrastructural IP module has been designed and incorporated i...
Xiao Zhang, Hans G. Kerkhoff, Bart Vermeulen
DAC
2001
ACM
14 years 8 months ago
A True Single-Phase 8-bit Adiabatic Multiplier
This paper presents the design and evaluation of an 8-bit adiabatic multiplier. Both the multiplier core and its built-in self-test logic have been designed using a true single-ph...
Suhwan Kim, Conrad H. Ziesler, Marios C. Papaefthy...
GLOBECOM
2007
IEEE
14 years 2 months ago
Redundant Array of Independent Fabrics - An Architecture for Next Generation Network
As the next generation network begins to incorporate the Internet, telecommunication and TV services, it becomes one of the most critical infrastructures for our society. Routers c...
Rongsen He, José G. Delgado-Frias