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GLVLSI
2003
IEEE
140views VLSI» more  GLVLSI 2003»
14 years 24 days ago
Exploiting multiple functionality for nano-scale reconfigurable systems
It is likely that it will become increasingly difficult to manufacture the complex, heterogeneous logic structures that characterise current reconfigurable logic systems. As a res...
Paul Beckett
DAC
2008
ACM
14 years 8 months ago
Driver waveform computation for timing analysis with multiple voltage threshold driver models
This paper introduces an accurate and efficient electrical analysis of logic gates modeled as Multiple Voltage Threshold Models (MVTM) loaded by the associated interconnect. MVTMs...
Peter Feldmann, Soroush Abbaspour, Debjit Sinha, G...
ISCAS
2007
IEEE
126views Hardware» more  ISCAS 2007»
14 years 1 months ago
Optimal Body Biasing for Minimum Leakage Power in Standby Mode
— This paper describes a new power minimizing method by optimizing supply voltage control and minimizing leakage in active and standby modes, respectively. In the active mode, th...
Kyung Ki Kim, Yong-Bin Kim
ASPDAC
2006
ACM
157views Hardware» more  ASPDAC 2006»
14 years 1 months ago
Delay modeling and static timing analysis for MTCMOS circuits
- One of the critical issues in MTCMOS design is how to estimate a circuit delay quickly. In this paper, we propose a delay modeling and static timing analysis (STA) methodology ta...
Naoaki Ohkubo, Kimiyoshi Usami
MJ
2007
87views more  MJ 2007»
13 years 7 months ago
Using SAT-based techniques in power estimation
Recent algorithmic advances in Boolean satisfiability (SAT), along with highly efficient solver implementations, have enabled the successful deployment of SAT technology in a wi...
Assim Sagahyroon, Fadi A. Aloul