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DSD
2006
IEEE
99views Hardware» more  DSD 2006»
14 years 19 days ago
Flexible Bus and NoC Performance Analysis with Configurable Synthetic Workloads
We present a flexible method for bus and network on chip performance analysis, which is based on the adaptation of workload models to resemble various applications. Our analysis m...
Rikard Thid, Ingo Sander, Axel Jantsch
LICS
2009
IEEE
14 years 3 months ago
Applications of Game Semantics: From Program Analysis to Hardware Synthesis
After informally reviewing the main concepts from game semantics and placing the development of the field in a historical context we examine its main applications. We focus in pa...
Dan R. Ghica
ISSS
1999
IEEE
112views Hardware» more  ISSS 1999»
14 years 1 months ago
Middleware Techniques and Optimizations for Real-Time, Embedded Systems
ended tutorial abstract appeared in the Proceedings of the 12th International Symposium On System Synthesis, IEEE, San Jose, CA, USA November, 11, 1999.
Douglas C. Schmidt
ISCAS
2007
IEEE
111views Hardware» more  ISCAS 2007»
14 years 3 months ago
Integrated Heterogenous Modelling for Power Estimation of Single Processor based Reconfigurable SoC Platform
—Various instruction and transaction based power estimation techniques for processor and on-chip buses have been proposed in the past. In this paper, we propose a heterogeneous p...
Prakash Srinivasan, Ali Ahmadinia, Ahmet T. Erdoga...