3902 search results - page 30 / 781 » Hardware Synthesis from C C Models |
DATE
2003
IEEE
14 years 2 months ago
2003
IEEE
Refinement is a key methodology for SoC design. The proposed IPSIM design environment, based on a C++ modeling library developed on top of SystemC 3.0, supports an object-oriented...
DAC
1997
ACM
14 years 1 months ago
1997
ACM
An experimental set of tools that generate instruction set simulators, assemblers, and disassemblers from a single description was developed to test if retargetable development to...
DATE
2008
IEEE
14 years 3 months ago
2008
IEEE
This paper presents a wrapper and TAM co-optimization method for reuse of SoC functional interconnects to minimize test time under area constraint. The proposed method consists of...
DATE
2010
IEEE
14 years 2 months ago
2010
IEEE
—Associated with the ever growing integration scales is the increase in process variability. In the context of networkon-chip, this variability affects the maximum frequency that...
DAC
2010
ACM
13 years 7 months ago
2010
ACM
As high-level models in C and SystemC are increasingly used for verification and even design (through high-level synthesis) of electronic systems, there is a growing need for com...