951 search results - page 156 / 191 » Hardware design experiences in ZebraNet |
ICCAD
2003
IEEE
14 years 6 months ago
2003
IEEE
— Memory-intensive applications present unique challenges to an ASIC designer in terms of the choice of memory organization, memory size requirements, bandwidth and access latenc...
FPGA
2010
ACM
14 years 6 months ago
2010
ACM
Placement based on simulated annealing is in dominant use in the FPGA community due to its superior quality of result (QoR). However, given the progression of FPGA device capacity...
ISPD
2009
ACM
14 years 4 months ago
2009
ACM
As VLSI technology moves to the 65nm node and beyond, interconnect delay greatly limits the circuit performance. As a critical component in interconnect synthesis, layer assignmen...
DATE
2009
IEEE
14 years 4 months ago
2009
IEEE
Three-dimensional integrated circuits are a promising approach to address the integration challenges faced by current Systems on Chips (SoCs). Designing an efficient Network on C...
MICRO
2009
IEEE
14 years 4 months ago
2009
IEEE
Performance and power are the first order design metrics for Network-on-Chips (NoCs) that have become the de-facto standard in providing scalable communication backbones for mult...