951 search results - page 72 / 191 » Hardware design experiences in ZebraNet |
ICCD
2001
IEEE
14 years 7 months ago
2001
IEEE
Reduced Ordered Binary Decision Diagrams (BDDs) are a data structure for representation and manipulation of Boolean functions which are frequently used in VLSI Design Automation. ...
MSE
2005
IEEE
14 years 3 months ago
2005
IEEE
The reusing of Intellectual Property cores has been an alternative to the increasing gap between design productivity and chip complexity of emerging System-on-chip (SoC) designs. ...
ISSS
1999
IEEE
14 years 2 months ago
1999
IEEE
Abstract--Reservation Tables (RTs) have long been used to detect conflicts between operations that simultaneously access the same architectural resource. Traditionally, these RTs h...
ICCAD
1997
IEEE
14 years 2 months ago
1997
IEEE
† This paper describes a novel methodology to automate the design of the interconnect distribution for multistage clock circuits. We introduce two key ideas. First, a hierarchica...
ICCAD
1996
IEEE
14 years 2 months ago
1996
IEEE
We present techniques for estimating switching activity and power consumption in register-transfer level (RTL) circuits. Previous work on this topic has ignored the presence of gl...