251 search results - page 15 / 51 » Hierarchical Modeling and Simulation of Large Analog Circuit... |
DAC
1996
ACM
13 years 11 months ago
1996
ACM
Abstract A divide-and-conquer algorithm for computing the parametric yield of large analog circuits is presented. The algorithm targets applications whose performance spreads could...
DATE
2003
IEEE
14 years 25 days ago
2003
IEEE
This paper presents a new method to automatically generate posynomial symbolic expressions for the performance characteristics of analog integrated circuits. The coefficient set ...
ICCAD
2005
IEEE
14 years 4 months ago
2005
IEEE
In this paper we propose a novel analog design optimization methodology to address two key aspects of top-down system-level design: (1) how to optimally compare and select analog ...
ASPDAC
2005
ACM
14 years 1 months ago
2005
ACM
-We propose a method involvingselectivesignalgating to minimize power dissipation in current-mode CMOS analog and multiple-valued logic (MVL) circuits employing a stack of current ...
ICCAD
2005
IEEE
14 years 4 months ago
2005
IEEE
Large-scale process fluctuations in nano-scale IC technologies suggest applying high-order (e.g., quadratic) response surface models to capture the circuit performance variations....