624 search results - page 15 / 125 » High Performance Matrix Multiplication on Many Cores |
BMCBI
2008
13 years 7 months ago
2008
Background: Eukaryotic cell cycle is a complex process and is precisely regulated at many levels. Many genes specific to the cell cycle are regulated transcriptionally and are exp...
IEEEPACT
2007
IEEE
14 years 2 months ago
2007
IEEE
Many sorting algorithms have been studied in the past, but there are only a few algorithms that can effectively exploit both SIMD instructions and threadlevel parallelism. In this...
ISQED
2006
IEEE
14 years 1 months ago
2006
IEEE
As transistor counts keep increasing and clock frequencies rise, high power consumption is becoming one of the most important obstacles, preventing further scaling and performance...
SIGCOMM
2009
ACM
14 years 2 months ago
2009
ACM
This paper presents BCube, a new network architecture specifically designed for shipping-container based, modular data centers. At the core of the BCube architecture is its serve...
MICRO
2009
IEEE
14 years 2 months ago
2009
IEEE
Aggressive prefetching is very beneficial for memory latency tolerance of many applications. However, it faces significant challenges in multi-core systems. Prefetchers of diff...