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» Impact of NBTI on FPGAs
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FPL
2003
Springer
128views Hardware» more  FPL 2003»
14 years 23 days ago
Case Study of a Functional Genomics Application
Although microarrays are already having a tremendous impact on biomedical science, they still present great computational challenges. We examine a particular problem involving the...
Tom Van Court, Martin C. Herbordt, Richard J. Bart...
ASPDAC
2000
ACM
92views Hardware» more  ASPDAC 2000»
13 years 12 months ago
Co-synthesis with custom ASICs
- This paper introduces the first hardwarekoftware co-synthesis algorithm that optimizes the implementations of ASICs that are used as processing elements for the embedded systems....
Yuan Xie, Wayne Wolf
FPGA
2010
ACM
209views FPGA» more  FPGA 2010»
14 years 4 months ago
FPGA power reduction by guarded evaluation
Guarded evaluation is a power reduction technique that involves identifying sub-circuits (within a larger circuit) whose inputs can be held constant (guarded) at specific times d...
Chirag Ravishankar, Jason Helge Anderson
FPGA
2005
ACM
97views FPGA» more  FPGA 2005»
14 years 1 months ago
Techniques for synthesizing binaries to an advanced register/memory structure
Recent works demonstrate several benefits of synthesizing software binaries onto FPGA hardware, including incorporating hardware design into established software tool flows with m...
Greg Stitt, Zhi Guo, Walid A. Najjar, Frank Vahid
ICCD
2007
IEEE
205views Hardware» more  ICCD 2007»
14 years 4 months ago
Hardware libraries: An architecture for economic acceleration in soft multi-core environments
In single processor architectures, computationallyintensive functions are typically accelerated using hardware accelerators, which exploit the concurrency in the function code to ...
David Meisner, Sherief Reda