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IPPS
2009
IEEE
14 years 2 months ago
Power-aware load balancing of large scale MPI applications
Power consumption is a very important issue for HPC community, both at the level of one application or at the level of whole workload. Load imbalance of a MPI application can be e...
Maja Etinski, Julita Corbalán, Jesús...
DATE
2009
IEEE
93views Hardware» more  DATE 2009»
14 years 2 months ago
Test cost reduction for multiple-voltage designs with bridge defects through Gate-Sizing
Abstract—Multiple-voltage is an effective dynamic power reduction design technique. Recent research has shown that testing for resistive bridging faults in such designs requires ...
S. Saqib Khursheed, Bashir M. Al-Hashimi, Peter Ha...
MICRO
2002
IEEE
108views Hardware» more  MICRO 2002»
14 years 12 days ago
Dynamic frequency and voltage control for a multiple clock domain microarchitecture
We describe the design, analysis, and performance of an on–line algorithm to dynamically control the frequency/voltage of a Multiple Clock Domain (MCD) microarchitecture. The MC...
Greg Semeraro, David H. Albonesi, Steve Dropsho, G...
ICCD
2005
IEEE
100views Hardware» more  ICCD 2005»
14 years 4 months ago
Power-Efficient Wakeup Tag Broadcast
The dynamic instruction scheduling logic is one of the most critical components of modern superscalar microprocessors, both from the delay and power dissipation standpoints. The d...
Joseph J. Sharkey, Kanad Ghose, Dmitry V. Ponomare...
ICCAD
2009
IEEE
135views Hardware» more  ICCAD 2009»
13 years 5 months ago
Enhanced reliability-aware power management through shared recovery technique
While Dynamic Voltage Scaling (DVS) remains as a popular energy management technique for real-time embedded applications, recent research has identified significant and negative i...
Baoxian Zhao, Hakan Aydin, Dakai Zhu