119 search results - page 7 / 24 » Impact of Technology Scaling on Digital Subthreshold Circuit... |
DAC
2003
ACM
14 years 8 months ago
2003
ACM
Parameter variation in scaled technologies beyond 90nm will pose a major challenge for design of future high performance microprocessors. In this paper, we discuss process, voltag...
ISCAS
2007
IEEE
14 years 1 months ago
2007
IEEE
- In this article, we explore the impact of strain on circuit performance when strained silicon (s-Si) devices are used for designing low-power high-speed circuits. Emphasis has be...
ICCAD
2010
IEEE
13 years 5 months ago
2010
IEEE
Abstract-- Many of us in the field of ultra-low-Vdd processors experience difficulty in assessing the sub/near threshold circuit techniques proposed by earlier papers. This paper i...
DSD
2007
IEEE
13 years 11 months ago
2007
IEEE
In this study, we investigate different cache fault tolerance techniques to determine which will be most effective when on-chip memory cell defect probabilities exceed those of cu...
DAC
1996
ACM
13 years 11 months ago
1996
ACM
Aggressive voltage scaling to 1V and below through technology, circuit, and architecture optimization has been proven to be the key to ultra low-power design. The key technology t...