1045 search results - page 141 / 209 » Improving SHA-2 Hardware Implementations |
HPCA
1998
IEEE
13 years 12 months ago
1998
IEEE
A key challenge in achieving high performance on software DSM systems is overcoming their relatively large communication latencies. In this paper, we consider two techniques which...
ISCA
1998
IEEE
13 years 12 months ago
1998
IEEE
Control-flow misprediction penalties are a major impediment to high performance in wide-issue superscalar processors. In this paper we present Selective Eager Execution (SEE), an ...
ISLPED
1996
ACM
13 years 12 months ago
1996
ACM
A 12-b 125 MSPS, digital to analog converter fabricated on a 0.6 micron single poly double metal CMOS process is presented. The design operates on supply voltages from 2.7 to 5.5 ...
ISCAS
1994
IEEE
13 years 11 months ago
1994
IEEE
This paper presents a new sequential decoding algorithm based on dynamic searching strategy to improve decoding efficiency. The searching strategy is to exploit both sorting and p...
DATE
2009
IEEE
13 years 11 months ago
2009
IEEE
This paper exploits the unique in-field controllability of the device polarity of ambipolar carbon nanotube field effect transistors (CNTFETs) to design a technology library with ...