259 search results - page 10 / 52 » Improving coverage analysis and test generation for large de... |
DATE
2000
IEEE
13 years 12 months ago
2000
IEEE
In this paper, we give an overview of the trade-off to improve yield and optimize silicon manufacturing cost. The specific technology focus is on large embedded memories in comple...
ETS
2009
IEEE
13 years 5 months ago
2009
IEEE
Structural on-line self-test may be performed to detect permanent faults and avoid their accumulation. This paper improves concurrent BIST techniques based on a deterministic test ...
ICCAD
1996
IEEE
13 years 11 months ago
1996
IEEE
Functional simulation is the most widely used method for design verification. At various levels of abstraction, e.g., behavioral, register-transfer level and gate level, the design...
GLVLSI
2002
IEEE
14 years 13 days ago
2002
IEEE
This paper develops new techniques for detecting both stuck-open faults and resistive open faults, which result in increased delays along some paths. The improved detection of CMO...
ICSE
2007
IEEE-ACM
14 years 7 months ago
2007
IEEE-ACM
We present a technique that improves random test generation by incorporating feedback obtained from executing test inputs as they are created. Our technique builds inputs incremen...