Sciweavers

452 search results - page 24 / 91
» Incremental formal design verification
Sort
View
DAC
1996
ACM
13 years 11 months ago
Functional Verification Methodology of Chameleon Processor
- Functional verification of the new generation microprocessor developed by SGS-THOMSON Microelectronics makes extensive use of advanced technologies. This paper presents a global ...
Françoise Casaubieilh, Anthony McIsaac, Mik...
ACSW
2006
13 years 8 months ago
Formal analysis of secure contracting protocol for e-tendering
Formal specification and verification of protocols have been credited for uncovering protocol flaws; revealing inadequacies in protocol design of the Initial Stage and Negotiation...
Rong Du, Ernest Foo, Colin Boyd, Kim-Kwang Raymond...
DATE
2004
IEEE
134views Hardware» more  DATE 2004»
13 years 11 months ago
Cost-Efficient Block Verification for a UMTS Up-Link Chip-Rate Coprocessor
ASIC designs for future communication applications cannot be simulated exhaustively. Formal Property Checking is a powerful technology to overcome the limitations of current funct...
Klaus Winkelmann, Hans-Joachim Trylus, Dominik Sto...
DAC
2002
ACM
14 years 8 months ago
Deriving a simulation input generator and a coverage metric from a formal specification
This paper presents novel uses of functional interface specifications for verifying RTL designs. We demonstrate how a simulation environment, a correctness checker, and a function...
Kanna Shimizu, David L. Dill
ECEASST
2010
13 years 4 months ago
Open Source Verification under a Cloud
Abstract: An experiment in providing volunteer cloud computing support for automated audits of open source code is described here, along with the supporting theory. Certification a...
Peter T. Breuer, Simon Pickin