174 search results - page 16 / 35 » Instruction Fetch Mechanisms for Multipath Execution Process... |
TVLSI
2010
13 years 2 months ago
2010
Program code in a computer system can be altered either by malicious security attacks or by various faults in microprocessors. At the instruction level, all code modifications are ...
MICRO
2006
IEEE
14 years 1 months ago
2006
IEEE
Growing on-chip wire delays will cause many future microarchitectures to be distributed, in which hardware resources within a single processor become nodes on one or more switched...
HPCA
2005
IEEE
14 years 7 months ago
2005
IEEE
The use of large instruction windows coupled with aggressive out-oforder and prefetching capabilities has provided significant improvements in processor performance. In this paper...
ISCA
1998
IEEE
13 years 11 months ago
1998
IEEE
Control-flow misprediction penalties are a major impediment to high performance in wide-issue superscalar processors. In this paper we present Selective Eager Execution (SEE), an ...
MICRO
2003
IEEE
14 years 23 days ago
2003
IEEE
Due to the widespread software piracy and virus attacks, significant efforts have been made to improve security for computer systems. For stand-alone computers, a key observation...