2784 search results - page 50 / 557 » Instruction Level Parallelism |
HPCA
2003
IEEE
14 years 10 months ago
2003
IEEE
With the constant advances in technology that lead to the increasing of the transistor count and processor frequency, power dissipation is becoming one of the major issues in high...
ISSS
1999
IEEE
14 years 2 months ago
1999
IEEE
This paper describes a mechanism for automatic design and synthesis of very long instruction word (VLIW), and its generalization, explicitly parallel instruction computing rocesso...
LCTRTS
2005
Springer
14 years 3 months ago
2005
Springer
Short vector (SIMD) instructions are useful in signal processing, multimedia, and scientific applications. They offer higher performance, lower energy consumption, and better res...
DATE
2007
IEEE
14 years 4 months ago
2007
IEEE
In this paper we research an FPGA based Application Specific Instruction Set Processor (ASIP) tailored to the needs of a flow aware Ethernet access node using a retargetable com...
HPCA
1995
IEEE
14 years 1 months ago
1995
IEEE
The throughput of a multiple-pipelined processor suffers due to lack of sufficient instructions to make multiple pipelines busy and due to delays associated with pipeline depende...