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GLVLSI
1996
IEEE
125views VLSI» more  GLVLSI 1996»
14 years 2 months ago
Performance-Driven Interconnect Global Routing
In this paper, we propose a global routing algorithm for multi-layer building-block layouts. The algorithm is based on successive ripup and rerouting while satisfying edge capacit...
Dongsheng Wang, Ernest S. Kuh
CDC
2010
IEEE
101views Control Systems» more  CDC 2010»
13 years 5 months ago
Performance-oriented communication topology design for large-scale interconnected systems
Abstract-- Communication networks provide a larger flexibility with respect to the control design of large-scale interconnected systems by allowing the information exchange between...
Azwirman Gusrialdi, Sandra Hirche
TVLSI
2002
82views more  TVLSI 2002»
13 years 10 months ago
Probability-based approach to rectilinear Steiner tree problems
Abstract--The rectilinear Steiner tree (RST) problem is of essential importance to the automatic interconnect optimization for VLSI design. In this paper, we present a class of pro...
Chunhong Chen, Jiang Zhao, Majid Ahmadi
FPGA
2008
ACM
173views FPGA» more  FPGA 2008»
13 years 12 months ago
The amorphous FPGA architecture
This paper describes the Amorphous FPGA, an innovative architecture attempting to optimally allocate logic and routing resource on per-mapping basis. Designed for high performance...
Mingjie Lin
GLVLSI
2009
IEEE
189views VLSI» more  GLVLSI 2009»
14 years 5 months ago
High-performance, cost-effective heterogeneous 3D FPGA architectures
In this paper, we propose novel architectural and design techniques for three-dimensional field-programmable gate arrays (3D FPGAs) with Through-Silicon Vias (TSVs). We develop a...
Roto Le, Sherief Reda, R. Iris Bahar